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Impala Linear Corporation
ILC1832
Preliminary
P Supervisory Circuit
General Description The ILC1832 is a multifunction circuit which monitors microprocessor activity, external reset and power supplies in microprocessor based systems. Ths circuit functions include a watchdog timer, power supply monitor, microprocessor reset, and manual pushbutton reset input. The power supply line is monitored with a comparator and an internal voltage reference. RST is forced low when an out-of-tolerance condition exists and remains asserted for at least 250ms after VCC rises above the threshold voltage (2.55V or 2.88V). The RST pin will remain logic low with VCC as low as 1.4V. The Watchdog input (ST) monitors P activity and will assert RST if no P activity has occurred within the watchdog timeout period. The watchdog timeout period is selectable with nominal periods of 150, 600, or 1200 milliseconds. * * * * * *
Features Power OK/Reset Time Delay, 250ms min. Watchdog Timer, 150 ms, 600ms, or 1.2s Typical Precision Supply Voltage Monitor, Select Between 5% or 10% of Supply Voltage 18A Supply Current Debounced External Reset Input 8-Pin SOIC or DIP Package Applications * * * * * Computers Controllers Critical Microprocessor Power Monitoring Intelligent Instruments Portable Equipment
Ordering Information
Part ILC1832N ILC1832M Package 8-Lead PDIP 8-Lead SOIC Temp. Range -40C to +85C -40C to +85C
Typical Circuit
VCC
Pin-Package Configurations
Top View
PBRST 1 8 7
VCC
TD
VCC P
VCC ST RST RST
ILC1832
PBRST ST RST TOL GND I/O RESET
TD 2
ILC1832
TOL 3 GND 4
6 5
ETC1832N - 8 Lead Plastic DIP Package ETC1832M - 8 Lead Plastic SOIC Package
Impala Linear Corporation
ILC1832 1.1
(408) 574-3939
www.impalalinear.com
October 1999
1
P Supervisory Circuit
Preliminary
Absolute Maximum Ratings
Parameter Terminal Voltage Input Current Symbol VCC All other inputs VCC GND All other inputs Operating Temperature Range Storage Temperature Range Lead Temperature (Soldering, 10 sec.) Power Dissipation TA Ratings -0.3 to 7.0 -0.3 to (VCC + 0.3) 250 25 -40 to +85 -65 to +150 300 700 Units V V mA mA C C C mW
Stresses above those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliability. Operating ranges define those limits between which the functionality of the device is guaranteed.
Electrical Characteristics
VCC = 3 to 5.5V, TA = Operating Temperature Range, unless otherwise noted.
Parameter Supply Voltage Range, VCC Supply Current, ICC ST and PBRST Input Levels VCC = 5V (See Note 1) VCC = 3.3V (See Note 1) VIH, VCC > 2.7V VIH, VCC < 2.7V VIL Input Leakage PBRST, IIL Output Voltage, RST, RST Output Voltage, RST, RST Output Voltage, RST VCC 5% Trip Point (Reset Threshold Voltage) VCC 10% Trip Point (Reset Threshold Voltage) Input Capacitance, ST, TOL Output Capacitance, RST, RST PBRST Min. Pulse Width, tPB PBRST Delay, tPBD Reset Active Time, tRST ST Pulse Width, tST ST Timeout Period, tTD TD = 0V TD = Open TD = VCC VCC Fall Time, tF VCC Rise Time, tR VCC Detect to RST Low and RST High, tRPD VCC Detect to RST Open and RST Low, tRPU
Note Note Note Note 1: 2: 3: 4:
Conditions
Min
Typ 18 15
Max 5.5 30 25 VCC + 0.3 VCC + 0.3 0.5 1
Units V A
2.0 VCC -0.4 -0.3 2.4
V A V V V V V pF pF ms ms ms ns
(See Note 2) ISOURCE = 350A, VCC = 3.3V ISINK = 10mA, VCC = 3.3V ISINK = 50A, VCC = 1.4V TOL= GND TOL= VCC CIN (See Note 3) COUT (See Note 3) PBRST = VIL (See note 4) 20 1 250 20 62.5 250 500 40 0 VCC Falling at 1.66 mV/s VCC Rising 250 5 610 150 600 120 0 4 610 2.80 2.47 2.88 2.55
0.4 0.3 2.97 2.64 5 7 20 1000 250 1000 2000
ms
s ns 8 1000 s ms
ICC is measured with PBRST and all outputs open and inputs within 0.5V of supply rails. PBRST has an internal 40k (typical) pull-up resistor to VCC. Guaranteed by design at TA = 25C. PBRST must be held low for a minimum of 20ms to guarantee a reset.
Impala Linear Corporation
ILC1832 1.1
(408) 574-3939
www.impalalinear.com
October 1999
2
P Supervisory Circuit
Preliminary
Pin Functions
Pin Number 1 Pin Name PBRST Description Pushbutton reset input. This input is debounced and can be driven with external logic signals or a mechanical pushbutton to actively force a reset. All pulses less than 1ms in duration on the PBRST pin are ignored. Any pulse with a duration of 20ms or greater is guaranteed to cause a reset. PBRST has an internal 40k (typical) pull-up resistor to VCC. Time delay input. This input selects the timebase used by the watchdog timer. When TD = 0V, the watchdog timeout period is set to a nominal value of 150ms, when TD = open, the watchdog timeout period is set to a nominal value of 600ms and when TD = VCC, the watchdog timeout period is 1.2 sec nominally. Tolerance select input. Selects whether 5% or 10% of VCC is used as the reset threshold voltage. When TOL = 0V, the 5% tolerance level is selected and when TOL = VCC, a 10% tolerance level is selected. Ground pin, 0V reference. RST is asserted high if either VCC goes below the reset threshold, the watchdog times out or PBRST is pulled low for a minimum of 20ms. RST remains asserted for one reset timeout period after VCC exceeds the reset threshold or after the watchdog times out or after PBRST goes high. RST is asserted low if either VCC goes below the reset threshold, the watchdog times out or PBRST is pulled low for a minimum of 20ms. RST remains asserted for one reset timeout period after VCC exceeds the reset threshold or after the watchdog times out or after PBRST goes high. Open-drain output. Input to the watchdog timer. If ST does not see a transition from high to low within the watchdog timeout period, RST and RST will be asserted. Power supply input.
2
TD
3
TOL
4 5
GND RST
6
RST
7 8
ST VCC
Block Diagram
VCC 8
Trip Point Select
+ -
Reset Generator
6
RST
TOL 3
Ref
5
RST
PBRST 1
Manual Reset Debounce
ST 7
Timeout Select
Watchdog Timer 4
TD 2
GND
Impala Linear Corporation
ILC1832 1.1
(408) 574-3939
www.impalalinear.com
October 1999
3
P Supervisory Circuit
Preliminary
Circuit Description
Power Monitor The RST and RST pins are asserted whenever VCC falls below the reset threshold voltage set by the TOL pin. A 5% tolerance level (2.88V reset threshold voltage) can be selected by connecting the TOL pin to ground or a 10% tolerance (2.55V reset threshold voltage) can be selected by connecting the TOL pin to VCC. The reset pins will remain asserted for a period of 250ms after VCC has resen above the reset threshold voltage. The reset function ensures the microprocessor is properly reset and powers up into a known condition after a power failure. RST will remain valid with VCC as low as 1.4V. Pushbutton Reset Input The PBRST input can be driven with a manual pushbutton switch or with external logic signals. The input is internally debounced and requires an active low signal to force the reset outputs into their active states. The PBRST input will recognize any pulse that is 20ms in duration or greater and will ignore all pulses that are less than 1ms in duration.
tPB PBRST tPDLY
RST tRST VCC VCCTP VCCTP RST
tRPD RST tRPU RST
Pushbutton Reset
Power-Up/Power-Down Sequence
Watchdog Timer The microprocessor can be monitored by connecting the ST pin (watchdog input) to a bus line or I/O line. If a high-tolow transition does not occur on the ST pin within the watchdog timeout period set by the TD pin (see Table 1), the RST and RST pins will be asserted rsulting in a microprocessor reset. RST and RST will remain asserted for 250ms when this occurs. A minimum pulse of 75ns or any transition high-to-low on the ST pin will reset the watchdog timer. The watchdog timer will be reset if ST sees a valid transition within the watchdog timeout period.
tSD
TD Pin GND Open VCC
Min. 62.5 ms 250 ms 500 ms
tTD Typ. 150 ms 600 ms 1200 ms
Max. 250 ms 1000 ms 2000 ms
Alternate Source Reference Guide
Industry P/N DS1832 DS1832S ILC Direct Replacement ILC1832N ILC1832M
ST
tTD
Watchdog Input
Impala Linear Corporation
ILC1832 1.1
(408) 574-3939
www.impalalinear.com
October 1999
4
P Supervisory Circuit
Preliminary
Packaging Information
M Package, 8-Pin Small-Outline
0.197 0.190
Pin 1 identifier
0.155 0.150
0.244 0.228
0.069 0.053 0.060 0.040 0.019 0.013
0.012 0.009
0.8
0.011 0.004
0.050 0.016
N Package, 8-Pin Plastic Dual In-Line
0.019 0.013
0.260 0.240
0.260 0.240 0.260 0.240 0.260 0.240 0.260 0.240
0.260 0.240
0.260 0.240 0.260 0.240
Devices sold by Impala Linear Corporation are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. Impala Linear Corporation makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. Impala Linear Corporation makes no warranty of merchantability or fitness for any purpose. Impala Linear Corporation reserves the right to discontinue production and change specifications and prices at any time and without notice. This product is intended for use in normal commercial applications. Applications requiring an extended temperature range, unusual environmental requirements, or high reliability applications, such as military and aerospace, are specifically not recommended without additional processing by Impala Linear Corporation. Impala Linear Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in an Impala Linear Corporation product. No other circuits, patents, licenses are implied.
Life Support Policy Impala Linear Corporation's products are not authorized for use as critical components in life support devices or systems. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labelling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonbly expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
Impala Linear Corporation
ILC1832 1.1
(408) 574-3939
www.impalalinear.com
October 1999
5

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